Assignment to part of a multi-dimentional array in VHDL -

i want change of elements in array, can figure out how it.

this line: sig3(1) <= (11, 12); gives me error

entity t1 end entity;  architecture testbench of t1      type type3 array(1 2, 1 2) of integer;      signal sig3 : type3;  begin     process     begin         -- sig3 <= ((11, 12), (13, 14));  -- works         sig3(1) <= (11, 12);   -- error:  "incompatible types assignment."         wait;     end process; end architecture; 

the way have defined array unfortunately precludes method favour of assigning: if decalre type this:

type type3 array(1 2, 1 2) of integer; signal sig3 : type3; 

assignments have specify index:

sig3(1,1) <= 11; sig3(1,2) <= 12; 

you can define 2d array array of 1-d arrays though

type type4 array(1 2) of integer; type type5 array(1 2) of type4; signal sig5 : type5; 

you can assign this:

sig5(1) <= (11,12); 

unfortunately, can't work in other dimension.