java - Simplified MIPS CPU using high level programming languages -


i'm trying design of analyzer/simulator simplified mips cpu using high level programming language preferably java. considered mips cpu adopts cdc 6600 scoreboard scheme dynamically schedule instruction scheduling , using cache load , store instruction cache hit , cache miss. need start advice simulation.

should use event queue simulation? if how?

a simple risc processor can simulated executing 1 instruction @ time. true pipelined cpu.

since want model superscalar processor, several instructions in flight @ same time, event based simulator best way correctly model instruction completes when, , how in-flight instructions compete processor resources.


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